1. Field of the Invention
This invention generally relates to the fabrication of integrated circuit (IC) devices, and more particularly, to a gate oxide and a method for forming the same using high-density plasma oxidation.
2. Description of the Related Art
The quality of polysilicon thin-films and the interface between silicon and silicon dioxide (Si/SiO2) layers are critical to the performance of thin-film transistors, MOS capacitors, and various ICs. The quality of the SiO2/Si interface is dependent upon the quality of the SiOx (where x is less than, or equal to 2) transition layer at the interface and the defects in the poly-Si layer. The general approach is to improve the quality of the SiOx transition layer at the Si/SiO2 interface. Defects in the poly-Si can also be passivated and the stoichiometry improved by oxidation and hydrogenation processes.
Although lower temperatures are generally desirable for any device fabrication process, they are especially critical in LCD manufacture, where large-scale devices are formed on a transparent glass, quartz, or plastic substrate. These transparent substrates can be damaged when exposed to temperatures exceeding 650 degrees C. To address this temperature issue, low-temperature Si oxidation processes have been developed. These processes use a high-density plasma source such as an inductively coupled plasma (ICP) source, and are able to form Si oxide with a quality comparable to 1200 degree C. thermal oxidation methods.
Various semiconductor devices require the deposition of SiO2, or other oxide thin-films, on structures that are planar or non-planar. For planar surfaces there is usually no problem in depositing uniform SiO2 thin-films over large areas in the fabrication of stable and reliable devices. However, for a device with vertical steps in the structure, such as shallow-trench isolation (STI), vertical thin-film transistors (V-TFTs), graded steps, or curved surfaces, it is important to deposit SiO2 films with sufficient step-coverage to maintain film integrity, device performance, and yield. Thermal oxide has proven to be the most suitable oxide from the step-coverage point of view. However, the low growth rates and high processing temperatures exceeding 800° C. make thermal oxidation unsuitable for low-temperature devices.
Plasma-enhanced chemical vapor deposition (PECVD) processes are suitable for the low temperature processing of the SiO2 thin-films. The electrical quality and the step-coverage of the PECVD deposited oxide thin-film is strongly dependent upon the processing conditions. It is possible to improve the step-coverage of the deposited oxide by decreasing the process temperature or varying the process chemistries and plasma process variables. However, any such attempt to improve the step-coverage results in a corresponding decrease in the oxide quality.
Low-temperature Si oxide deposition processes are also used to fabricate stepped structures, such as an interlevel interconnect via. Although step-coverage is improved by lowering the process temperatures, the quality of the resultant Si oxide is poor. Thus, good Si oxide step-coverage can conventionally be obtained in non-critical areas of an IC structure, such as a field oxide region for example. However, vertical thin-film transistors (V-TFTs) for example, requiring both a high quality Si gate oxide film and good step-coverage, have been difficult to fabricate.
Generally, a fixed oxide charge is a positive charge that remains after annealing out interface trap charges, and is caused as a result of a structural defect. These fixed oxide charges occur primarily within 2 nanometers of a Si/SiO2 interface. The charge density is dependent upon oxidation and hydrogenation processes. It is known that these fixed oxide charges can be minimized through the use of high oxidation temperatures. Fixed oxide charges in a gate oxide layer can act to degrade the threshold voltage of a transistor.
Oxide trapped charges can be formed at the interface between a silicon layer and a metal or Si substrate, or can be introduced throughout the oxide layer as a result of ion implantation. Mobile ionic charges can also be formed at the silicon oxide interface as a result of ionized alkali metals, sodium, or potassium. A gate insulator with any of the above-mentioned oxide charge types can degrade the threshold voltage, breakdown voltage, and current gain of a transistor.
It would be advantageous if a process could be developed to enhance Si/SiO2 interfaces at a significantly lower thermal budget and temperature.
It would be advantageous if a low-temperature process could be developed that permitted the fabrication of step-covered Si oxide gate insulators.
It would be advantageous if the above-mentioned low-temperature process could reduce the oxide charge concentration in a gate insulator.